The Cadence MSA team had a GREAT DesignCon highlighting how Cadence can help you accelerate your PCB and advanced IC packaging design cycles with electromagnetic, electronic, and thermal system analysis, and tackle advanced IC packaging and cross-platform challenges.
Here’s a quick recap of all our activities:
Sponsored Sessions
- Industry expert Shiv Agarwal from Meta shared insights on optimizing high-speed signal performance in the demanding environments of mixed and virtual reality applications.
- Zhiping Yang, CEO of PCB Automation Inc. and adjunct professor at Missouri S&T EMC laboratory, and our own Cadence IP Packaging group presented a case study on how to sign off your UCIe interface, offering practical guidance on ensuring robust interface compliance in your designs.
Take a look at all of the DesignCon sponsor session papers that are now available.
Panels and Presentations
- Cadence participated in a challenges-of-interposers panel with NVIDIA, Marvell, and Microsoft.
- Cadence, Al Neves from Wild River, and Dr. Eric Bogatin from the University of Colorado-Boulder delved into the challenges of designing high-speed serial links for AI systems.
- Cadence, along with experts from Oracle, Amazon, Samtec, and ST Microelectronics, explored the complexities of power distribution network (PDN) design in a session that highlighted the need for updated target impedance methodologies that vary with frequency and spatial position.
Booth Highlights
A special meet and greet in our booth with Dr. Eric Bogatin, dean of the Signal Integrity Academy and an Adjunct Professor at the University of Colorado, Boulder, offered an exclusive signed Rule #9 hat.
Solution Demos
- High-performance 3D electromagnetic (EM) modeling solutions for interposer, package, and PCB designs
- Advanced workflows for multi-chiplet 3D design flows
- LPDDR5X solutions at 9.6Gbps on 3nm, tailored for AI and automotive applications
- 224G Long-Reach SerDes for UALink, paving the way for next-level connectivity
- Interposer/package/PCB signal, power, and thermal integrity analysis
Now that the show is over, be sure to check in with us to see what new and exciting information is coming out from Cadence, especially our SI Center of Excellence, where we will be sharing real-world design guidance to help you achieve extreme system signal integrity.
Last but certainly not least, take a minute to read the EDACafe DesignCon interview with Cadence Product Management Group Director Brad Griffin. Brad talks about Cadence’s shift-left approach and the future of advanced package design, the complexity of heterogeneous integration, making AI chip design feasible, thermal challenges in high-performance systems, fixing broken design flows, and the future of simulation and AI-driven design.